Texas Instruments TLIN1022A-Q1 Dual LIN Transceivers

Texas Instruments TLIN1022A-Q1 Dual LIN Transceivers offer integrated wake-up and protection features and provides dominant state timeout. The TLIN1022A-Q1 is compliant with LIN 2.0, LIN 2.1, LIN 2.2, LIN 2.2A, and ISO/DIS 17987–4 standards. LIN is a single wire bidirectional bus typically used for low-speed in-vehicle networks using data rates up to 20kbps. The TLIN1022A-Q1 is intended to support 12V applications with wider operating voltage and additional bus-fault protection.

The TI TLIN1022A-Q1 Dual LIN Transceivers converts the LIN protocol data stream on the TXD input into a LIN bus signal using a current-limited wave-shaping driver, reducing electromagnetic emissions (EME). The LIN receiver delivers data rates up to 100kbps for faster in-line programming. The receiver converts the data stream to logic-level signals transferred to the microprocessor through the open-drain RXD pin. Ultra-low current consumption is achieved using the sleep mode, which allows wake-up via LIN bus or EN pin.

The TLIN1022A-Q1 is available in a SOIC-14 package and leadless VSON-14 package with wettable flanks.

Features

AEC-Q100 (Grade 1) qualified for automotive applications
Compliant to LIN 2.0, LIN 2.1, LIN 2.2, LIN 2.2 A and ISO/DIS 17987–4 electrical physical layers (EPL) specification
Conforms to SAE J2602-1 LIN network for vehicle applications
Functional Safety-Capable
- Documentation available to aid in functional safety system design
Wide operational supply voltage range from 4V to 36V
Sleep mode: ultra-low current consumption allows wake-up event from:
- LIN bus
- Local wake up through EN

Supports 12V battery applications
LIN transmit data rate up to 20kbps
LIN receive data rate up to 100kbps
Power up and power down glitch-free operation on LIN bus and RXD output
Protection features:
- ±45V LIN bus fault-tolerant
- Undervoltage protection on VSUP
- TXD Dominant time out protection (DTO)
- Thermal shutdown protection
- Unpowered node or ground disconnection failsafe at a system level
Available in SOIC (14) package and leadless VSON (14) package with wettable flank