BittWare XUP-P3R FPGA Accelerator Cards

BittWare XUP-P3R FPGA Accelerator Cards are 3/4-length PCIe x16 cards based on the Xilinx Virtex UltraScale+ FPGA, which delivers high performance, high bandwidth, and reduced latency for systems requiring massive data flow and packet processing. The XUP-P3R cards offer extensive memory configurations, including support for up to 512GB, sophisticated clocking and timing options, and four front-panel QSFP cages, each supporting 100Gbps (4x25 G) and 100GbE. The serial expansion port (SEP) allows the XUPP3R to be expanded for an additional PCIe Gen3 x16 slot, supplementary 4 QSFPs, or connection between two XUPP3Rs. BittWare XUP-P3R FPGA Accelerator Cards integrate a board-management controller (BMC) for advanced system monitoring and simplifying platform integration and management. The XUP-P3R is ideal for data center applications, including network processing and security, acceleration, storage, broadcast, and SigInt.

Features

Extensive memory configurations, up to 512GB DDR4
Integrates BMC for advanced system monitoring
4x 100GbE via 4 QSFP28

2.5M LCs FPGA by Xilinx up to VU9P
Simplifies platform integration and management

Specifications

FPGA
- Virtex UltraScale+ VU9P
- Core speed grade – 2
Onboard flash memory for booting FPGA
External memory
- 4 DIMM sites, each supporting
  - Up to 128 GBytes DDR4 x72 with ECC
  - Up to 576 Mbits dual QDR-II+ x18 (2 independent 288 Mbit banks)
x16 Gen3 host interface directly to FPGA
Micro USB 2.0 ports for debugging and programming FPGA and Flash
Serial expansion port (SEP)
- Expansion interface to FPGA via 20x GTY transceivers (optional; requires the second slot)
- 14x GPIO signals to the FPGA
Board management controller
- Voltage, current, and temperature monitoring
  - Power sequencing and reset
- Field upgrades
- FPGA configuration and control
- Clock configuration
- I²C bus access
- USB 2.0
- Voltage overrides
FPGA development

QSFP cages
- 4 QSFP28 (zQSFP) cages on the front panel connected directly to FPGA via 16 transceivers
- Each supports 100GbE, 40GbE, 4x 25GbE, or 4x 10GbE and can be combined for 400GbE
Cooling
- Double-width active fan and heatsink - standard
- Double-width passive heatsink - optional
- Double-width advanced passive cooling with heat pipes - optional
Electrical
- Onboard power derived from a 12V PCIe slot & an AUX connector (6-pin)
- Power dissipation is application-dependent
+5°C to +35°C operating temperature range
Form factor
- 3/4-length, standard-height PCIe dual-slot board
- 9.4" x 4.37"
Application development
- HDL/Verilog
  - BittWorks II Toolkit – host, command, and debug tools for BittWare hardware
  - Xilinx Vivado Design Suite
- OpenCL - Xilinx SDAccel dev environment, SDAccel platform release, and pre-built examples for XUP-P3R

Compliances

•  FCC (USA) 47CFR15.107 / 47CFR15.109
•  CE (Europe) EN 55032:2015/A11:2020 / EN55024:2010 / EN 55035:2017 / EN 61000-3-2:2014 / EN 610003-3:2013
•  UKCA (United Kingdom) BS EN 55032:2012/AC:2013 / BS EN55024:2010 / BS EN 55035:2017 / BS EN 61000-3-2:2014 / BS EN 610003-3:2013
•  ICES (Canada) ICES-003 issue 7
•  Safety objectives referred to in Article 3 and set out in Annex I of DIRECTIVE 2014/35/EU have been fulfilled
•  RoHS compliant to the 2011/65/EU + 2015/863 directive